摘要
本文提出了将DDS技术应用于接收机自动频率控制环路中可控数字频率产生器的一种实现方案 ,详细阐述了该产生器VLSI实现的算法和结构 .
In this paper,one scheme has been proposed for controllable digital frequency generator in the AFC loop of a receiver.DDS technique is used here.The algorithm and architecture for the VLSI implementation of this digital frequency generator are discussed.Finally,simulations of performance and analysis are given.
出处
《电子学报》
EI
CAS
CSCD
北大核心
2002年第3期422-424,共3页
Acta Electronica Sinica