复合栅控二极管新技术提取热载流子诱生的NMOS/SOI器件界面陷阱的横向分布

A Novel Combined Gated-Diode Technique for Extracting Lateral Distribution of Interface Traps in SOI NMOSFET

提出了用复合栅控二极管新技术提取 MOS/ SOI器件界面陷阱沿沟道横向分布的原理 ,给出了具体的测试步骤和方法 .在此基础上 ,对具有体接触的 NMOS/ SOI器件进行了具体的测试和分析 ,给出了不同的累积应力时间下的界面陷阱沿沟道方向的横向分布 .结果表明 :随累积应力时间的增加 ,不仅漏端边界的界面陷阱峰值上升 ,而且沿沟道方向 。

A novel combined gated diode technique for extracting the lateral distribution of interface traps in SOI NMOSFET is presented.The key of this technique lies in the recombination generation (R G) current peak origination from the interface trap recombination is being modulated by the drain voltage of the combined forward gated diode architecture.The extraction principle is introduced in detail and the extraction procedure is also erected.The experimental results qualitatively show that the induced interface traps gradually decrease from the drain and source edges to the channel region while showing the highest value near both edges SOI in NMOSFET.