摘要
针对基于浮点加法器的CORDIC(Coordinate Rotation Digital Calculation,坐标旋转数字计算)实现单精度浮点型三角函数的角度收敛范围受限、处理速度低、电路开销大、响应延时长等问题,通过将浮点运算转化为定点运算以及对无缩放因子CORDIC算法的优化,提出一种基于查找表技术和双步迭代技术的高计算效率电路设计结构,解决了无缩放因子CORDIC算法计算三角函数需要引入乘法器和迭代次数过高的问题.在Stratix IV(EP4SGX70DF29C2X型FPGA)上实现了满足IEEE-754标准的单精度浮点正弦、余弦的三角函数运算.实验结果表明该电路工作频率可达282MHz,对比已有电路结构,响应延时和电路总面积有效降低,计算精度达到10E-7.
There are four questions for single-precision floating point trigonometric functions by CORDIC(Coordinate Rotation Digital Calculation)algorithm based on floating point adder,including the range of angles is not enough,large area,low operating frequency and high output delay.In this paper,a high computation circuit structure based on look up table and two-step iterative technology is proposed through converting floating-point operations into fixed-ponit operations and the optimization of scaling free CORDIC.It solves the problem that the CORDIC algorithm needs to use the multiplier and high numbers of iteration.This circuit is implemented on Altera’s Stratix IV(EP4 SGX70 DF29 C2 XFPGA)and achieves Sin and Cosine in IEEE-754 standard.The synthesis results show the clock frequency can reach 282 MHz.Comparing to existed circuit structure,output delay and area reduced effectively,the calculation accuracy can reach 10 E-7.
作者
李天立
尹韬
魏星
杨海钢
LI Tian-li;YIN Tao;WEI Xing;YANG Hai-gang(Insititute of Electrics,Chinese Academy of Sciences,Beijing 100190,China;University of Chinese Academy of Sciences,Beijing 100049,China)
出处
《微电子学与计算机》
CSCD
北大核心
2018年第12期33-37,共5页
Microelectronics & Computer
基金
国家自然科学基金(61474120
61404140
61704173)
北京市科技重大专项课题(Z171100000117019)
北京工商大学北京市重点实验室开放课题基金(BKBD-2017KF05)