无人机平台数字预处理的FPGA实现

Implementation of Digital Preprocess Based on FPGA for Pilotless Aircraft

讨论了基于FPGA的无人机平台下预处理功能的实现。由于载体的功率体积受限,需要实现资源利用的最小化。其重点是在数字脉压等运算模块中使用定点算法,通过压缩有效字长从而达到资源最小化的目标。在实现时,每个模块均采用流水结构,数据通过率可以达到167 MB来满足系统的速度要求。通过对信号动态与精度的分析,把处理数据调整到适宜的定点位数。该预处理已成功应用于某型产品的系统设计中,该产品已定型。

This paper resolves the problem how to realize pre-process function under the UAV air-born platform based of FPGA. Because power and volume for carrier is limited,resource utilization minimization should be implemented. The goal is achieved by calculating effective compression character length. Its key is to adopt fixed-point arithmetic in calculation modules such as digital pulse and compression etc. during this period,each module utilizes pipeline construct whose data passing rate can reach to 167 MB to meet the speed requirement of system. Through the analysis of signal dynamic and accuracy,processing data would be adjusted to proper fix-point bits. This pre-process has been successfully applied in system designation for some sort of finalized radar.