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编译低功耗优化技术的研究 被引量:1

Technology Studies for Low Power at Compiling Optimization Time
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摘要 低功耗技术越来越受到下一代微处理器系统和编译研究工作者的重视。一向认为是硬件研究内容的低功耗技术,事实上,在微处理器发展的今天,又展现出了一种新的潜在的开发空间和研究内容,那就是通过软件技术降低系统的功耗。这一部分潜力空间是仅通过硬件技术无法涉足的,只有通过软件方法来解决,但这种软件低功耗技术又很难强加给应用程序编写者。文章结合笔者在编译时低功耗优化技术的研究工作,对目前该方向的研究方法、编译策略和实现技术进行了论述和探讨。 Low power technology is concerned increasingly by the researchers of architecture and compiler for next generation microarchitecture processor system.Low power is usually considered to be the things belong the hardware re-search.In fact,with the development of microarchitecture there is another potential research field for low power present-ed today.It is the technology to lower the power by software methods.This can't be mentioned only by the hardware design.But the application programmer can't be forced to do this.So this paper gives a discussion and presentation about the study method,compiling policy and implementation technology on this field combining with authors work for low power.
出处 《计算机工程与应用》 CSCD 北大核心 2002年第8期6-9,共4页 Computer Engineering and Applications
基金 国家863高科技发展计划资助项目(编号:2001AA111091)
关键词 低功耗 编译优化 体系结构 微处理器 Low Power,Compiling Optimization,Architecture
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参考文献8

  • 1[1]J Yang,R Gupta. Low Power Microarchitectures and Compiler Support.http://www.cs.arizona.edu/people/gupta/research/Projects/power.html
  • 2[2]Tao Li,Chen Ding. Instruction Balance,Energy Consumption and Program Performance[R].University of Rochester,Technical Report,2001.12
  • 3[3]Chung Hsing Hsu,Ulrich Kremer,Michael Hsiao. Compiler-Directed Dynamic Frequency and Voltage Scheduling[M].Workshop on PowerAware Computer Systems(PACS′00) ,Cambridge,MA,2000.11
  • 4[4]John S Seng,Dean M Tullsen,La Jolla et al.Power-Sensitive Multithreaded Architecture[C].Published in Proceedings of the 2000 International Conference on Computer Design,2000
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