CMOS集成电路静电泄漏实验分析

Analysis for Electrostatic Discharge Experiment of CMOS IC

CMOS集成电路的静电损伤一直是影响其可靠性的一个重要因素。当器件尺寸缩小到1μm以下时 ,在减小芯片I/OPAD尺寸、提高工作频率的同时 ,保证较高的抗静电能力就显得尤为重要。本文首先对两种 1μmMOS集成电路进行静电击穿实验 ,并对实验结果分析 。

The electrostatic discharge is an important factor that affects the reliability of CMOS IC.When the size of the device shrinks to 1 micrometer or below,during decreasing the size of I/O PAD,increasing the operation speed,it is important to ensure high electrostatic discharge capability.In this paper,based on the experimental results of two kinds of 1 micron MOS IC,various methods to improve the protection capability of ESD are given.