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一种适合VLSI库的Rail-to-Rail运算放大器 被引量:4

A Rail-to-Rail Operational Amplifier Suitable As a Library Cell for VLSI
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摘要 介绍了一种适于 VLSI库单元的轨到轨 (Rail-to-Rail)运算放大器。低电压、低功耗、输入输出动态幅度达到 Rail-to-Rail的运放模块是研究的核心。文章分析了该运放模块的输入、输出级 ,并分析了 cascodedMiller频率补偿技术。芯片采用新加坡特许半导体制造公司 0 .6μm N阱 CMOS工艺 ,芯片面积 0 .0 2 4mm2 。测试结果表明 :该运放模块在 3 V工作电压下直流增益 90 d B,共模输入范围 -0 .4~ 4V,输出动态范围 0~ 2 .9V,单位增益带宽 7MHz,相位裕量 70°,静态功耗仅有 0 .3 m W,特别适合作为 A Rail to Rail operational amplifier suitable as VLSI library cell is presented. The goal of reseach aims at designing a compact operational amplifier with low power, low supply voltage and Rail to Rail input/output range. The Rail to Rail input/output stage and cascoded Miller compensation method in the op amp are analysed. The prototype was fabricated using 0.6 μm digital CMOS process of CHARTERED SEMICONDUCTOR MANUFACTURING PTE LTD. Its die area is 0.024 mm 2. Under 3 V supply voltage, the testing results are that the dc gian of the op amp is 90 dB,input range is -0.4~4 V,output range is 0~2.9 V,unit gain bandwidth is 7 MHz, phase margin is 70°, while the static dissipation is only 0.3 mW, so it is very suitable as a VLSI library cell.
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 2002年第1期107-113,共7页 Research & Progress of SSE
关键词 轨到轨 运算放大器 VLSI operational amplifier rail to rail GBW phase margin cascoded Miller compensation.
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参考文献1

  • 1李联 郑增钰.CMOS运算放大器设计[M].上海集成电路设计教育服务中心,1999..

同被引文献35

  • 1程旭,陈诚,徐栋麟,任俊彦,许俊.电源自适应Rail-to-RailCMOS运算放大器[J].微电子学,2002,32(5):335-339. 被引量:1
  • 2徐栋麟,林越,杨柯,程旭,任俊彦,许俊.低电压满电源幅度CMOS运算放大器设计[J].固体电子学研究与进展,2004,24(3):373-380. 被引量:4
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