深亚微米集成电路中的连线分割和缓冲器插入

Buffer Insertion and Wire Segmenting for Deep Submicron IC

为在一定的时间限制下得到最少的缓冲器插入数目和连线分段数目 ,提出了一种深亚微米电路设计方法 .该方法通过将传统的可变尺寸驱动连线模型改为缓冲器连线分段模型 ,得到了最优的缓冲器插入数目和连线分段数目 .实验结果表明 ,在不同的时间限制下 。

A new algorithm combined the buffer insertion and wire segmentation of VLSI design in deep submicron environment was presented. Compared with the length variable model, the wire segmentation model has the buffer driver instead, and then gets the optimized buffer number and wire segmentation result . Finally, the experiment result was analyzed.