功率场效应晶体管VDMOS导通电阻的优化

Optimization of On-Resistance in Power VDMOS Transistors

本文对大功率场效应晶体管VDMOS器件的导通电阻与单元结构的参数进行了研究,重点讨论了栅宽、外延层厚度和浓度与导通电阻的关系,计算出的I-V曲线随单元结构参数的不同有明显的改变,为实际研制工作提供了依据。

The relationship between on-resistance and parameters of cell structures in power FET VDMOS transistors is investigated in this paper,with emphasis on the dependence of on-resistance on gate width, gate oxide thickness and impurity concentration of epi-layers. The calculated curves showing I-V characteristics vary significantly with different parameters of cell structures, which may provide a guide to the practical designing and processing of the device.