利用可编程器件设计DVB-C系统中的RS编码器

The design of RS encoder for DVB-C system by FPGA

通过对RS码的原理和算法进行研究和比较 ,我们认为使用Berlekamp算法在利用FPGA设计RS编码器时占用的硬件资源较少。

Compare the principle and arithmetic of RS code ,we realized that the less hardware used when we design the RS encoder in FPGA by the Berlekamp algorithm. In this article we emphases on design the RS encoder in FPGA by the Berlekamp algorithm.