大规模集成电路工艺中“鸟头”平坦化的研究

An Investigation into Iso-Planarization Technique in VLSI Process

介绍了大规模集成电路 ( VLSI)工艺中“鸟头”的形成 ,研究了平坦化“鸟头”的原理和过程。着重讨论了平坦剂的选择和涂胶 ,以及利用干法刻蚀进行平坦化的各种参数 ,获得了实用的平坦化“鸟头”的工艺条件。“鸟头”高度由原来的 0 .7μm左右下降为 0 .2 5μm左右 。

Formation of 'bird head' in VLSI is described in the paper The principle of iso planarization and its process are investigated The selection of photoresist, film thickness and different parameters for plasma etching is discussed in detail Practical process conditions for iso planarization are obtained With this technique, the height of bird head is reduced from 700 nm to about 250 nm