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整数级进化型硬件 被引量:2

The Integer Function Level Evolution Hardware
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摘要 本文提出一种以可编程整数处理单元为进化单位的FPGA结构模型。给出了函数级硬件进化的概念 ,并介绍了相应的遗传算法。 A FPGA structure model--a programmable Integer processing unit used as evolution cell is put forward in this paper. The concept of function hardware evolution, as well as genetic algorithm is presented.
作者 乔双 宋建中
出处 《电子器件》 CAS 2002年第2期139-142,共4页 Chinese Journal of Electron Devices
基金 中科院长春光学精密机械与物理研究所青年创新基金 (q0 1h0 1)的资助
关键词 FPGA 进化型硬件 遗传算法 FPGA evolvable hardware genetic algorithm
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二级参考文献5

  • 1[1]Tetsuya Higuchi. Evolvable hardware with genetic learning: A first step towards building a darwin machine[C]. Proc. of 2nd International Conference on the Simulation of Adaptive Behavior.1993. 417~424.
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同被引文献10

  • 1SALAMI M, CAIN G. Adaptive Hardware Optimization Based on Genetic Algorithms[C]. Proceedings of The Eighth International Conference on Industrial Application of Artificial Intelligence & Expert Systems (IEA95AIE), Melbourne: Gordon and Breach Science
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  • 6Higuchi T. Evolvable hardware with genetic learning: A first step towards building a Darwin machine[C]. In: Proc of 2nd International Conference on the Simulation of Adaptive Behavior,1993:417.
  • 7Sipper M, Mange D and adn Andres Perez-Uribe(editors), Proc. of Second international Conference on Evolvable Systems(ICES98)[C]. Lecture Notes on Computer Science, 1478, Springer Verlag(1998).
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  • 9乔双.进化型硬件及其基本构成[J].小型微型计算机系统,2001,22(6):766-768. 被引量:8
  • 10乔双.模拟进化型Butterworth滤波器[J].电子器件,2002,25(2):143-146. 被引量:12

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