摘要
给出了一种能以40MHz速率对输入信号进行采集的信号采集设计。该电路包括信号的程控衰减与放大、A/D转换和数据存储。详细讨论了A/D转换和数据存储的时序关系。
An input circuit of packing-up signal is given, which can work at the select-ing speed of 40 MHz.The circuit contains attenuation and gain sub circuit controlled by program, analog-digital converter and data memorizer. This paper fully discusses time-order between analog-digital converter and data memorizer.
出处
《电测与仪表》
北大核心
2002年第6期53-55,共3页
Electrical Measurement & Instrumentation
关键词
信号采集电路
输入通道
A/D转换
时序分析
设计
circuit of packing-up signal
input channel
analog-digital converter
time-or-der analysis
