基于SOC的PAGER控制芯片设计

A Pager Controller Design Based on SOC

文章讨论了PAGER控制器芯片(ZQD021)的系统设计,该控制器内部集成了FLASH,SRAM、POCSAG协议解码器和嵌入式MCUCORE。重点分析了芯片的可测性设计(DFT)、内嵌FLASH设计、低功耗设计。其设计方法和思路对消费类和嵌入式控制芯片的设计有一定的借鉴意义。

An Integrated Pager Controller (ZQD021),which contains embedded MPU,POCSAG decoder,SRAM and Flash memory,is designed using SOC approach. Particularly the testability,embedded Flash memory control and low power design are discussed in detail. The methodology and considerations described may be applied to some other embedded designs in consumer electronics field.