摘要
密码技术是信息安全的关键技术 ,密码算法的快速实现日益重要 ,解决这一问题的有效途径之一是采用CPLD/FPGA实现算法。通过对数据加密标准DES算法的分析 ,设计了一种针对该算法的电路模型 ,并给出了基于Altera公司的CPLD的实现方案。针对DES算法的关键部分S盒 ,讨论了几种可能的设计方案 ,给出了优化结果 ,并对结果做出比较。该算法已经下载到FLEX10K30E器件内 ,加 /解密速度可达 2 0
Cryptotechnique is the key technique of information security, accordingly a quick implementation of cryptographic algorithm has become more and more important. One of the efficient ways to solve this problem is to implement the algorithm with CPLD/FPGA. This paper introduces a circuit model of data encryption standard (DES) based algorithm and presents an implementation scheme based on Altera's CPLD. As for the key part of the DES algorithm-S box, the paper discusses several possible design schemes and compares the results. The algorithm has been downloaded into FLEX10K30E device, it can encrypt or decrypt 200Mbit per second.
出处
《系统工程与电子技术》
EI
CSCD
北大核心
2002年第5期88-90,共3页
Systems Engineering and Electronics