多引擎密码SoC并行处理技术研究与设计

Research and design of parallel processing technology for multi-engines cipher SoC

为了提高密码SoC的处理性能,在分析多引擎密码SoC互连结构和密码处理引擎工作方式的基础上,提出了一种采用非总线结构互连多个密码处理引擎,通过AMBA总线连接各功能模块的多引擎密码SoC并行处理架构。进行了通信数据包的设计、数据分配机制的分析和并行运行流程的开发等多引擎密码SoC并行处理机制的研究。使用65nm CMOS工艺标准模块库进行了ASIC综合。仿真结果表明,该系统可以灵活、高效地实现不同工作模式下的多种密码算法,达到了较高程度的并行化。

To improve the performance of the cipher SoC,the existing multicore cipher SoC interconnect structure as well as the working mode were analyzed and then a multicore cipher processing SoC based on AMBA bus was designed,which integrated a non-bus multicore cipher processing engine.In addition,the parallel processing mechanism of multicore cipher SoC was studied, including designing of a dedicated data frames architecture for cipher processing,proposing a assignment partition mechanism for different application conditions,and developing a process of parallel processing.The ASIC synthesis was done under the 65 nm CMOS technology library of standarded modules.The simulation result showed that the system could realize the common algo-rithms of different mode flexibly,and achieved a high degree of parallelism.