摘要
针对重离子加速器(HIRFL)的低电平相幅稳定系统,设计了以同步置位直接数字频率合成器(DDS)技术为基础的同步相位信号源作为系统的不同频、严相位的基准信号源。以FPGA芯片为核心,采用VHDL语言设计各功能模块,简化了设计过程,便于升级。经过电路设计、模块仿真和现场测试,验证了设计的正确性。测试结果表明:该系统具有可靠性高、精度高、稳定度高、频率范围宽、便于控制等优点。
A synchronous phase signal source based on synchronous set direct digital synthesis(DDS)technology as a various frequency and strict in-phase reference signal source of system was designed for low level phase and magnitude stabilization system of HIRFL. Taking FPGA as the kernel,the functional modules was designed with the VHDL language,which simplified the design process. It is easy to upgrade. The validity of system was verified by the circuit design,module simulation and test on spot. Performance test results show that the system has the advantages of high reliability,high precision,high stability and wide frequency range,and is easy to control.
出处
《现代电子技术》
2014年第14期14-17,共4页
Modern Electronics Technique