多种中值滤波算法在可重构架构上的映射实现

Mapping of multiple median filtering algorithms on reconfigurable architecture

为了满足图像应用对椒盐噪声高性能实时处理的需求,解决传统设计方法仅能针对特定滤波算法实现固定参数的限制,在粗颗粒度可重构架构上映射实现了多种中值滤波算法.通过分析中值滤波算法的计算数据特点,探索出滤波算法在重构架构的数据并行和重用方法.同时,通过优化可重构计算单元的微结构设计来适应中值滤波算法的映射,扩展重构计算单元的输出端口设计,引入分布式跨域寄存器.实验结果表明,采用SMIC 130 nm CMOS工艺实现100 MHz系统主频,可以获得最高75.21×106像素/s的像素处理速率.可重构方法可以灵活实现多种中值滤波算法,满足不同复杂度和分辨率下图像的实时处理需求.

In order to meet the needs of real-time processing salt and pepper noise on the image and resolve the limits of traditional design methods with fixed parameters for particular filtering algo-rithms, several median filtering algorithms are proposed on a coarse grained reconfigurable architec-ture.Considering both the data and computing features of median filtering algorithms, the approach for data parallel and reuse is explored on reconfigurable architecture.Meanwhile, micro-structural optimization for reconfigurable computing architecture is developed to suit the efficient median filte-ring algorithm mapping.Both the reconfigurable computing output port and distributed cross register file are introduced.The experimental results show that by adopting the SMIC （ Semiconductor Manu-facturing International Corporation ） 130 nm CMOS （ complementary metal-oxide-semiconductor transistor） process to realize a system frequency of 100 MHz, the highest pixel processing rate up to 75.21 ×106 pixel/s can be achieved.The reconfigurable method can offer flexibility to achieve a va-riety of median filtering algorithms to meet real-time image processing requirements with different complexities and resolutions.