基于FPGA实现的FFT速度与规模分析

Analysing the Speed and Scale of FFT Implemented with FPGA

本文是研究基于FPGA实现的FFT在完成一次FFT时所需处理时间和所需乘法器的一种通用计算公式。可用来计算不同结构、可变点数的FFT在基于FPGA实现时完成一次FFT的最短时间和乘法器的数量,并使用FPGA软件验证了公式的正确性。

This article is to propose a general calculation formula to get the processing time and the number of multiplier which implementation of FFT based on the FPGA. This formula Can be used to calculate the different structure, variable points FFT based on FPGA that implemented to complete a FFT of the shortest time and the number of multiplier. On the last I have used the FPGA software to verify the validity of the formula.