基于FPGA的数字频率计设计

The Design of Digital Cymometer Based on FPGA

针对周期测量法在高频段表现差强人意的缺点,提出了周期自适应测量法的设计方案,即在增加一项自动调整待测信号测量周期的功能。同时设计一款基于FPGA的数字频率计,其中EDA工具采用Altera公司出品的Quartus II 5.1,硬件描述语言使用VHDL,PLD芯片是Altera Cyclone EP1C6T144C8。

Aim at the weakness of Period Measuring Method that it usually works badly at the high frequency segment, thispaper put forward a kind of design project called Self-reacting Period Measuring Method, namely adding a function that auto-adjusting the period for measuring to it. Then design a digital Cymomete based on FPGA, including EDA tools produced byAhera corporation Quartus II 5.1, using hardware description language VHDL, PLD chip is Ahera Cyclone EP1C6T144C8.