基于FPGA的脉冲压缩处理器设计与实现

Design and implementation of pulse compression processor based on FPGA

在合成孔径雷达系统中,高速及高精度脉冲压缩是一项关键技术。采用FPGA技术实现脉冲压缩,克服了DSP芯片处理速度有限,成本高的问题。该文设计了一种基于IEEE浮点表示格式的改进的并行FFT算法结构,并利用该FFT处理模块实现线性调频信号频域脉冲压缩处理器的设计。利用Xilinx ISE 13.1软件完成脉冲压缩处理模块设计以及波形仿真。仿真结果表明,利用该FFT运算结构实现的基于FPGA的脉冲压缩处理器可以在合理利用硬件资源的同时提高运算速度及运算精度。

In Synthetic Aperture Radar system,high-speed and high-precision pulse compression is a key technology.Implementation of pulse compression based on FPGA technology solves the problems of limited speed and high cost of DSP chips.This paper proposes an improved parallel structure of FFT based on IEEE floating point format.This structure is used to achieve the pulse compression processor of linear frequency modulation signal in frequency domain.The module design and waveform simulation of pulse compression are achieved with Xilinx ISE 13.1 software.The simulation results show that the pulse compression processor with the structure of FFT based on FPGA can make use of the resources reasonably and increase both the speed and the precision of computation.