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采用数字校准技术的单片12位D/A转换器

A Monolithic 12-bit D/A Convertor Digitally Calibrated
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摘要 阐述了一种分段式R-2R阶梯结构的D/A转换器电路。它利用数字码控制熔丝电阻网络,有效改善了工艺、温度以及电压等外界因素引起的R-2R阶梯结构匹配特性。依据CSMC的0.5μm,25V,BCD工艺模型进行设计,仿真结果表明12位D/A转换器的INL值为0.21LSB、DNL值为0.35LSB。 The paper presents a segmented R -2R ladder digital to analog convertor.Based on the design of fuse resistor network,it can digitally calibrate the match tolerance performance of R -2R ladder structure,which caused by the factors of process,temperature and voltage.The paper simulates it with 0.5μm,25V,BCD process model in CSMC.The results show that the value of INL is 0.24LSB and DNL is 0.35LSB.
出处 《微处理机》 2014年第4期19-20,23,共3页 Microprocessors
关键词 D A 转换器 数字校准 分段式 R-2R 阶梯 Digital to analog convertor Digitally calibration Segmented R -2R ladder
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参考文献3

  • 1J.Naylor.A complete high - speed,voltage output 16bit monolithic DAC [ J ].IEEE.J.Solid - State Circuits,1983,18(6):729 -735.
  • 2D S karadimas.A digitally calibrated R -2R ladder archi- tecture for high performance DAC [ J ].ISCAS,2006:4778 - 4782.
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