摘要
针对无机头电脑横机单针驱动模块控制要求,设计一种基于FPGA的8路并行单针驱动设计方案。该设计方案硬件以FPGA为核心,通过定制的串、并总线驱动协议驱动,实现一个子控制器同时驱动15个基本织针驱动单元。本设计总线驱动时钟频率是200 kHz,单路刷新频率为1 kHz,可满足无机头电脑横机在等效机速1.6 m/s的编织速度下正常运行。本设计为无机头电脑横机控制器的开发提供了一定的技术基础,为无机头编织技术、三维针织技术提供技术保障。
Based on the control requirements of individual needle driven modules of headless computerized flat knitting machine, the paper designs a new kind of multiplexed output controller based on FPGA. This project can drive 120 needles （15 driven module） with custom driven protocol. This design bus driven clock frequency is 200 KHz, and single-channel refresh frequency is 1 KHz, which can meet the normal knitting conditions of headless computerized flat knitting machine under speed of 1.6 m/s. The research made in this paper can provide the technology foundation for developing controller of headless computerized flat knitting machine, and can also apply corresponding technical support for headless knitting and three-dimensional knitting technology.
出处
《针织工业》
北大核心
2014年第8期27-29,共3页
Knitting Industries
基金
国家自然科学基金项目(51305309)
中国纺织工业协会指导项目(2012113)
关键词
无机头电脑横机
单针驱动模块
FPGA
步进电动机驱动
Headless Computerized Flat Knitting Machine
Single Needle Driven Module
FPGA
Step Motor Driven
