粗线条的2.5D硅转接板高速信号布线设计与仿真分析

The Layout Design and Electronic Simulation for Coarse Interposer RDL of the High Speed 2. 5D Package

硅转接板作为2.5D集成的核心结构,通过TSV(through silicon via)提供垂直互联大大缩短了连线长度;同时其热膨胀系数与芯片较好匹配,并兼容圆片级工艺,因此硅转接板拥有着广阔的应用与发展空间。然而由于现有的封装工艺条件的限制,以及半导体硅高损耗的特性,在实现高速信号的高密度集成时,会出现损耗、串扰等多方面的信号完整性问题。结合封装工艺,针对硅转接板10μm线宽的RDL(redistribution layer)传输线多种布线结构在ANSYS的全波电磁场仿真软件HFSS中建立模型。通过仿真,得出硅衬底对传输线电性能的影响;以及单端和差分传输线的合理布线方式,并且提出了高速传输线的高密度排布结构。通过20μm线宽RDL传输线的高频电测试与仿真的结果分析,得出转接板RDL制作工艺的可靠性以及仿真方法的准确性,同时得出RDL层间介质厚度对传输线高频电性能的影响。

In 2. 5D structure, silicon interposer is the core structure that provides a vertical interconnection by TSV and RDL which greatly reduces interconnection length. Because of the limitation of Chinese existing state of packaging technology and the high loss property of semiconductor material, it is hard to realize high density and high speed integration. The signal integrity issues including loss and crosstalk for transmission lines on muhi-redistribution layers（RDL） of silicon interposer are discussed. lines GSG, GSSG structure and microstrip-line are built and been verified by test and simulation results are proposed. Multiple models such as coplanar waveguide （CPW） some reasonable high density layout projects that have