摘要
数字信道化接收机具有全概率、实时接收的特点,已经广泛应用于电子战、软件无线电等领域。为解决无线电信号搜索系统中处理速度与高分辨率之间的矛盾,在讨论了信道化原理的基础上利用Verilog HDL语言在Xilinx-V5系列开发板上实现了一个8信道的用于监测频谱的信道化接收机,采用自上而下的模块化设计方法重点介绍了信道化处理部分的实现。实现结果表明中频输入信号能在对应的信道得到正确输出,分辨率提高了8倍。具有一定的工程实用价值。
Digital channelized receiver has been widely applied in the electronic warfare,software radio and other fields because of its characters of full probability,real-time. To solve the problem in radio signals search system of contradiction between the processing speed and high resolution, an 8-channel monitoring channelize-receiver has been implemented on Xilinx-V5 series development board by Verilog HDL,which is based on the discussion of the principle of the channelized technology. Mainly introduces the channelized processing part of the implementation which is based on modularized design method. The result of implementation has shown that the input signals can get the correct output at its corresponding channel,and resolution is raised 8 times. The system has some practical value in engineering.
出处
《电子器件》
CAS
北大核心
2014年第4期714-717,共4页
Chinese Journal of Electron Devices
基金
国家自然科学基金重大项目(60990320
60990323)
国家自然科学基金面上项目(61271090)
国家863计划重大项目(2012AA012305)
四川省科技支撑计划项目(2012GZ0101)
成都市科技计划项目(12DXYB347JH-002)
关键词
软件无线电
频谱监测
信道化
FPGA
高分辨率
channelization
soft radio
frequency spectrum monitoring
FPGA
high resolution