Virtex FPGA抗单粒子翻转技术

Technique of Single Event Upset for Virtex FPGA

SRAM型FPGA开发过程灵活,在航天领域有广泛的应用,但该系列FPGA易发生单粒子翻转事件,导致功能中断或信息丢失。配置刷新结合三模冗余能有效抑制单粒子翻转带来的影响。在详细讨论了配置刷新+三模冗余的基础上,提出了FPGA自主刷新+三模冗余的解决方案,保证FPGA抗单粒子性能的基础上提高了系统的资源利用率,经注错试验验证了方案可行性。

The development process of SRAM-based FPGA is various,and it is widely applied to astronautics. The SRAM FPGA are sensitive to single event upset （ SEU） which might result in information loss or functional interruption. The adverse effects caused by SEU can be effectively controlled by Triple Modular Redundancy （ TMR） and scrubbing. The TMR and scrubbing are discussed in detail. The solution of self-hosting configuration management and TMR is proposed. The efficient use of resources is improved based on self-hosting configuration management of FPGA,and the fault injection test result shows that this solution is feasible.