分布式结构的FIR滤波器的FPGA实现

Implementation of FPGA on FIR Filter with Distributed Structure

本文将EDA技术引入"数字信号处理"课程实验教学,采用FPGA实现了一款基于分布式算法的4阶FIR滤波器;利用FPGA的ROM宏模块构建查找表,实现了分布式算法;利用QUARTUSⅡ软件完成分布式滤波器电路设计以及波形仿真。与传统的调用QUARTUS II软件中的参数化FIR宏模块实现方式相比,采用分布式算法实现FIR滤波器,不仅能大大节省FPGA资源开销,提高运算速度,而且有利于提升学生应用FPGA进行硬件设计与开发的能力。

By introducing EDA technology to the experiment teaching of the Digital Signal Processing course,a 4order filter based on distributed algorithm is implemented in FPGA. the lookup table（ LUT） is built to realize the distributed algorithm by using ROM macro-module of FPGA. The logic design and waveform simulation of the filter is finished on QUARTUSⅡ software. Compared to the style of calling the multiplexing multiplier macro module,the hardware expenses of the DA structure circuit can be cut down greatly and the operation speed can be increased too. Further more,this experiment teaching mode is benefit for improving the student＇s ability of hardware design and development.