基于DSP+FPGA的嵌入式图像处理系统设计

Design of embedded image processing system based on DSP+FPGA architecture

为满足数据量大、算法复杂度高的应用需求,使用高性能DSP完成复杂图像算法处理,FPGA作为协处理器,完成图像采集、存储和显示等功能,构建了一种高性能的嵌入式图像处理系统。DSP和FPGA通过EMIF接口实现了高速无缝互联。采用三重缓冲读写机制解决了采集和显示的异步时钟域问题及算法处理时间不确定的问题。介绍了基于BIOS和NDK开发的C6455软件流程,展示了该系统图像处理算法运行周期的统计结果。该系统运行稳定可靠,具有较高的实用价值。

To meet the application requirements of large amount of data and complex image processing,a high-performance embedded image processing system based on DSP ＋ FPGA Architecture was established,in which high-performance DSP is used to realize complex image algorithm processing,and FPGA is adopted as a coprocessor to implement image acquisition, storage,display,etc. A high-speed seamless interconnection between DSP to FPGA is implemented through EMIF interface. The problems of asynchronous clock domain between image acquisition and display,and algorithm processing time uncertainty were solved by means of triple buffering read-write mechanism. The C6455 software flow developed on the basis of BIOS and NDK is introduced. The statistical results of the image processing algorithm execution cycles of this system have been demonstrated. This system is stable and reliable,and has high practical value.