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基于SOPC的数字预失真器设计与实现 被引量:1

Design and Implementation of Digital Predistorter Based on SOPC
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摘要 目前数字预失真技术的研究多偏重在不同算法的仿真方面,对具体实现技术的研究较少。为此,设计一种基于可编程片上系统(SOPC)的自适应数字预失真器。采用多项式查找表电路来实现预失真功能,用现场可编程门阵列(FPGA)内的EDK工程完成系数计算,以避免全硬件实现带来的复杂性。以IP核的形式下载到Xilinx FPGA上,并在测试平台对其进行验证,结果表明,该预失真器能改善功放的线性度,对于8MHz带宽的OFDM信号和doherty结构的GaN功放,ACPR可改善8dB,并且具备自适应功能,可较好地应用到实际工作环境中。 At present, the study of the Digital Predistortion ( DPD ) mainly focuses on the simulation of different algorithms,and the specific implementation technology research is less. A kind of adaptive digital predistortion device based on System on a Programmable Chip( SOPC) is proposed in this paper,the design adopts polynomial lookup table circuit to achieve the predistortion, and uses EDK project complete coefficient calculation. This method avoids the complexity brought by the whole hardware implementation,can satisfy the requirements of the adaptive function,and has the very strong practical value. Finally it downloads the design to Xilinx FPGA,and tests it in a test platform. Results show that the predistorter can effectively improve the linearity of the power amplifier. For the OFDM signal of 8 MHz bandwidth and the doherty GaN amplifier, ACPR can improve 8 dB and with the adaptive function, it can be a good application to the actual working environment.
出处 《计算机工程》 CAS CSCD 2014年第10期118-121,共4页 Computer Engineering
基金 湖南省科技计划基金资助项目(2012GK3151)
关键词 功率放大器 数字预失真 可编程片上系统 现场可编程门阵列 线性化 自适应 power amplifier Digital Predistortion (DPD) System on a Programmable Chip (SOPC) FieldProgrammable Gate Array (FPGA) linearization adaptation
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参考文献10

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