基于FPGA的高性能数据采集和预处理系统的设计

Design of High-Performance Data Sampling and Preprocessing System Based on FPGA

为满足电子战接收机对瞬时输入带宽的应用要求,提出一种基于FPGA的高性能数据采集和预处理系统。该系统采用3片Virtex-5 FPGA对ADC采样数据进行协同处理,能够实现双通道4.8Gsps的数据采样。实验结果表明,在相同测试条件下,该系统比传统的系统具有更好的信噪比和更高的有效位。

To meet the requirements of wide instantaneous input bandwidth of the electronic warfare （ EW） re-ceivers, a high-performance data sampling and preprocessing systemwas presented based on FPGA.The sys-tem can co-process sampled data with three FPGAs and achieve up to 4.8 Gsps dual channel data sampling. The experiment results demonstrated that the system designed in the paper had a better SNR （ Signal Noise Rati-o） and higher ENOB （Effective Number of Bits） than the traditional system under the same parameter condi-tions.