基于遗传算法的多核芯片并发追踪调试方法

A concurrent trace debugging method for multi-core chip based on generic algorithm

基于追踪的调试技术将追踪信号连接到追踪缓存,这些连接设施不仅占用有限的片上资源,全局连线还可能导致信号完整性问题.一种有效的解决方案是复用片上网络传输追踪数据.复用片上网络传输多组并发追踪信号,需要确定追踪缓存数量和放置位置以满足链路带宽的约束,同时实现传输功耗最小化.本文将该问题规约为NP难约束P-Median问题,并提出了一种基于遗传算法的多追踪缓存选址方法.在片上网络链路带宽的约束下,优化追踪缓存选址数和追踪数据传输能耗,为多组并发追踪信号的实时追踪提供了一种有效方法.实验结果表明,在同等约束条件下,多缓存能够有效提高追踪信号数量.相比于以前的研究结果,本文方法能够有效地减少缓存选址数和降低追踪数据传输能耗.

Trace-based debugging technologies need connect trace signals to trace buffer with additional infrastructure, which not only consumes the limited on chip resource, but also results in the problem of signal integration. Reusing network-on-chip eliminates the problems. But it is still a challenge problem that how to determine the locations of trace buffer under the limitations of link bandwidth and transmission power. We formulate it as P-Median problem which is NP-hard. Then a method based on generic algorithm is proposed. It can optimize the location number of trace buffers and transmission power simultaneously. Experimental results show that multiple trace buffer locations can increase the number of concurrent trace signals in contrast to centralized trace buffer. Compared to previous method, the proposed method can deducing the locations of trace buffer and reducing the transmission power efficiently.