摘要
在分析传统FPGA动态重构方法性能缺陷的基础上,创新性的提出了基于改进型游程编码的FPGA动态重构方法,并详细介绍了该方法的设计实现。与传统FPGA动态重构方法对比测试结果表明,基于改进型游程编码的FPGA动态重构方法不仅可以显著提高FPGA动态重构的速度,而且可以降低对程序存储器容量要求。目前,该技术已在重大工程项目中得到应用。
Based on the analysis of shortages in the conventional dynamic reconfiguration method, a novel approach based on improved run-length coding was advanced to improve the performance of dynamic reconfiguration of FPGA. The design and implementation of the approach were also described in detail. The performance results compared with the conventional dynamic reeonfiguration method show that not only the speed of dynamic reconfiguration of FPGA can be improved but also the requirement of the storage capacity can be reduced by this ap- proach. Now, it has already been proved in the major projects.
出处
《电子器件》
CAS
北大核心
2014年第5期1009-1012,共4页
Chinese Journal of Electron Devices
关键词
FPGA
动态重构
全局重构
游程编码
重构速度
FPGA
dynamic reconfiguration
global reconfiguration
run-length coding
speed of dynamic reconfigu-ration