一种快速瞬态响应LDO的设计与实现

Design and Implementation of a Fast Transient Response LDO

设计了一种快速瞬态响应LDO。采用缓冲级结构的增强电路,使功率器件在负载瞬态变化时,栅极能够及时响应,从而避免了较大的电压上冲与下冲。加入缓冲级电路以后,系统的稳定性变差,采用密勒补偿和前馈补偿对其进行频率补偿,增加系统的相位裕度,使系统稳定。采用CSMC 0.5μm工艺,利用Cadence工具完成了整体电路的设计、前仿真、物理版图设计和后仿真,并进行了流片。测试结果表明,设计的LDO输出电压为2.5V,负载电流在10mA和300mA之间变化时,电压最大变化48mV,响应时间为12.4μs。

An fast transient response LDO was designed. The enhancement circuit was a buffer stage structure, so the gate of the power device could response quickly to avoid large voltage overshoot and undershoot. As the transient response enhancement circuit lowered the stability of the system, Miller compensation and feed-forward compensation was used to compensate the system and to increase the system＇s phase margin, so to make the system stable. The design was based on CSMC 0.5 μm CMOS process. The whole circuit design, pre-simulation, physical design, post-simulation and tape out were carried out with the Cadence tools. The test results showed that output voltage of the LDO was 2.5 V. When the load current varied between 10 mA and 300 mA, the maximum output voltage variation was 48 mV and the minimum response time was 12.4 μs.