摘要
随着FMCW雷达的应用领域越来越广泛,对于FMCW信号发生器的性能要求也越来越高。采用了DDS激励PLL的混合式频率合成技术对合成器相位噪声、杂散损耗和线性度等性能指标进行分析,在此基础上设计并实现了2.4 GHz载频FMCW信号发生器。其中DDS芯片AD9910产生低频段的线性调频信号,PLL芯片HMC820LP6CE通过倍频将低频段调频信号倍频到高频段,STM32为控制器。实测结果表明,该系统具有频率分辨率高、相噪低、杂散损耗小、捷变频时间短、线性度高的特点。其近端杂散为-59.64 d Bc,远端杂散为-55.02 d Bc,相位噪声在100 k Hz处为-95.57 d Bc/Hz,在400 k Hz处为-118.38 d Bc/Hz。
With the more and more wide application of FMCW radar,the performance requirements of FMCW signal generator is also more stringent. The DDS＋PLL frequency synthesis technique was used to analyze the phase noise,stray loss and linearity performance indexes of the synthesizer. Based on this,a 2.4 GHz FMCW signal generator was designed,in which DDS chip AD9910 generates low frequency chirp signal,PLL chip HMC820LP6 CE as multiplier converts FM signal in low frequency to that in high frequency,and STM32 is taken as its controller. The experimental results show that the system has the characteristics of high frequency resolution,low phase noise,low stray loss,short frequency switching time,high linearity. Its proximal stray is-59.64 d Bc,remote stray is-55.02 d Bc,phase noise at 100 k Hz is-95.57 d Bc/Hz and at 400 k Hz is-118.38 d Bc/Hz.
出处
《现代电子技术》
2014年第21期53-57,61,共6页
Modern Electronics Technique
