基于SRAM型FPGA的容错性设计

Fault-tolerance techniques for SRAM-based FPGAS

随着SRAM型FPGA在航天领域中的不断应用,空间环境下单粒子翻转(single event upsets,SEU)问题不断涌现。为了加强航天电子产品在轨的可靠性与安全性,介绍了一种基于Xilinx公司Vertix-II系列FPGA的容错性设计,该设计深入研究了动态刷新(Scrubbing)原理,利用反熔丝型FPGA作为控制器实现了对SRAM型FPGA的配置数据进行ms级的周期刷新,并对2种FPGA加入了三模冗余(triple modular redundancy,TMR)及回读比较重加载方法,设计兼顾了系统重构、冗余处理和故障恢复,效果良好。实验结果表明刷新周期仅为131.2ms,远大于空间单粒子翻转率,能有效地抑制单粒子翻转效应的影响。

SRAM based FPGA is used widely in the aerospace application with the problems of the Single Event Upsets continuously appearing. In this paper , a detailed design to the fault-tolerance of the Virtex-II FPGA is proposed for enhancing the reliability and security of the aerospace electronic product in orbit. The design does the further study on the theory about scrubbing. The configuration bitstream of SRAM based FPGA is scrubbed periodically in milliseconds level by the anti-fuse FPGA controller,then both FPGAs implemented triple module design redundancy , readback and reloading. The design includes reconfigurable system, redundancy measurers and fault Recovery. The results show that the scrubing period is only 131.2 ms which is much longer the upset rate of the SEU. So the influence of Single Event Upsets is restrained availably .