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An improved fully integrated,high-speed,dual-modulus divider

An improved fully integrated,high-speed,dual-modulus divider
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摘要 A fully integrated 2n/2n+1 dual-modulus divider in GHz frequency range is presented. The improved structure can make all separated logic gates embed into correlative D flip-flops completely. In this way, the complex logic functions can be performed with a minimum number of devices and with maximum speed, so that lower power consumption and faster speed are obtained. In addition, the low-voltage bandgap reference needed by the frequency divider is specifically designed to provide a 1.0 V output. According to the design demand, the circuit is fabricated in 0.18 μm standard CMOS process, and the measured results show that its operating frequency range is 1.1- 2.5 GHz. The dual-modulus divider dissipates 1.1 mA from a 1.8 V power supply. The temperature coefficient of the reference voltage circuit is 8.3 ppm/℃ when the temperature varies from -40 to + 125 ℃. By comparison, the dual-modulus divide designed in this paper can possess better performance and flexibility. A fully integrated 2n/2n+1 dual-modulus divider in GHz frequency range is presented. The improved structure can make all separated logic gates embed into correlative D flip-flops completely. In this way, the complex logic functions can be performed with a minimum number of devices and with maximum speed, so that lower power consumption and faster speed are obtained. In addition, the low-voltage bandgap reference needed by the frequency divider is specifically designed to provide a 1.0 V output. According to the design demand, the circuit is fabricated in 0.18 μm standard CMOS process, and the measured results show that its operating frequency range is 1.1- 2.5 GHz. The dual-modulus divider dissipates 1.1 mA from a 1.8 V power supply. The temperature coefficient of the reference voltage circuit is 8.3 ppm/℃ when the temperature varies from -40 to + 125 ℃. By comparison, the dual-modulus divide designed in this paper can possess better performance and flexibility.
出处 《Journal of Semiconductors》 EI CAS CSCD 2014年第11期125-129,共5页 半导体学报(英文版)
基金 supported by the Open Program of National Short-wave Communication Engineering Technology Research Centre(No.HF2013002)
关键词 fully-integrated dual-modulus divider source-coupled logic (SCL) bandgap reference fully-integrated dual-modulus divider source-coupled logic (SCL) bandgap reference
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参考文献13

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