摘要
介绍的基于多相结构的数字信道化技术具有实时处理大量数据能力的特点,是克服高速ADC与FPGA处理速度之间的矛盾的关键技术。从数学模型上描述了整个接收机的工作流程,并在MATLAB环境中对系统进行了仿真,仿真结果验证了该算法模型的正确性与高效性。
According to the characteristic of the digital channelized receiver, which must have the ability of processing the large number of data in real time, an efficient digital parallel analyzing system is introduced in this paper, and it adopts the multi-phase filter technology to implement channelization. The method resolves the contradiction between the high-speed ADC and low-speed digital signal processor (FPGA). The working processing of the whole receiver is described from mathematics model, and the system is simulated in MATLAB environment. The correctness and the validity of the algorithm model are proved by the simulation results.
出处
《信息通信》
2014年第10期47-49,共3页
Information & Communications
关键词
多相滤波
数字信道化接收机
multi-phase filter digital channelized receiver