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多模式GNSS接收机的数字AGC电路设计

A digital AGC circuit design for multi-mode GNSS receiver
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摘要 设计了一款应用于GNSS接收机的快速数字自动增益控制电路(AGC),该AGC电路采用三级增益控制算法实现快速稳定的增益收敛,对2 bit及以上ADC具有很好的普适性。电路仿真了增益收敛速度和稳定度以及有带内连续波干扰情况下不同量化精度的信噪比性能,结果表明所设计电路可以很好地满足性能要求。 A digital fast automatic gain control (AGC) circuit is designed for multi-mode GNSS receiver,the AGC circuit uses three-stage gain control algorithm to achieve fast and stable gain control.For two and more bit ADC,it is well transplantable.Gain convergence rate and stability are analyzed along with SNR performance due to continuous wave interference and ADC bits variation.Simulation results show its good performance.
出处 《电子技术应用》 北大核心 2014年第12期43-45,52,共4页 Application of Electronic Technique
关键词 数字AGC 三级增益控制 GNSS接收机 信噪比性能 digital AGC three-stage gain control GNSS receiver SNR performance
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参考文献6

  • 1Xie Jun, Chi Baoyong, Xu Yang, et al.A low power 45 dB DR all-digital assisted AGC loop for a GNSS receiver in 0.18 um CMOS[C].IEEE International Conference on ICSICT, 2012 : 1-3.
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二级参考文献5

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