摘要
研究并提出了一种基于二维访问机制的数据缓存结构(2D Cache)及其更新管理策略.该缓存结构可以在控制硬件存储开销的同时,有效提升可重构系统的数据访存效率.实验结果表明,仅需4 KB的数据缓存开销,可重构系统的访存性能提升了29.16%~35.65%,并且对于不同标准的媒体处理算法都能获得较好的优化效果,具有很好的适应性.芯片实测结果表明,采用所述数据缓存设计方案的可重构系统可以在200 MHz下满足1080p@30fps的实时解码需求,与国际同类架构相比,性能提高了1.8倍以上.
In order to improve the data flow of the reconfigurable system with a lower embedded data memory cost,a data cache optimization method is proposed,including the two-dimensional Cache structure and the related cache management strategy.The experimental results show that the approach is efficient for various multimedia applications,and the memory access performance of the reconfigu-rable system can be improved by 29.16% to 35.65% with a 4 KB data cache.The proposed data cache structure was adopted in a reconfigurable system and realized with real chip.Based on the the proposed data cache structures,the reconfigurable system can support the 1080p@30fps stream deco-ding at the clock frequency of 200 MHz.Moreover,the performance of the reconfigurable system is 1 .8 times higher than that of other reconfigurable architectures.
出处
《东南大学学报(自然科学版)》
EI
CAS
CSCD
北大核心
2014年第6期1149-1154,共6页
Journal of Southeast University:Natural Science Edition
基金
国家自然科学基金资助项目(61404028
61204023)
国家高技术研究发展计划(863计划)资助项目(2012AA012703)
关键词
可重构系统
数据缓存结构
缓存管理策略
reconfigurable system
data cache structure
cache management strategy