集成L波段VCO的频率合成器设计

Design of the Frequency Synthesizer Integrated L-Band VCO

从频率合成器的构成和噪声模型入手,分析了主要单元电路对噪声的贡献,进而研究了各频率合成器模块中的噪声影响因子,建立了不同模块的噪声模型,并在模型基础上改进了压控振荡器的电流源结构及鉴相器的延时单元电路,从而提高了频率合成器的噪声性能。根据上述方法,采用0.18μm射频CMOS工艺设计实现了一款低功耗、低噪声的频率合成器,经测试,核心电压1.8 V,功耗54 m W,带内噪声达到了-98 d Bc/Hz。测试结果表明噪声指标达到了国外同类产品水平,为设计和研发高集成度的射频收发系统芯片提供了很好的参考。

The noise contribution of the main circuit was analyzed by the noise model and structure of frequency synthesizer. The noise impact factors of each frequency synthesizer model were studied, and the noise models of different modules were set up. The structure of current source and delay circuit of the phase detector were improved based on the noise model, and the noise performance of the frequency synthesizer was improved. A low power and low noise frequency synthesizer was implemented in a standard 0. 18 Ixm RF CMOS process. The power consumes of the frequency synthesizer is only 54 mW under 1.8 V supply voltage, the noise is -98 dBc/Hz in-band. The main performance of the frequency synthesizer has met the level of similar foreign products. It provides a very good reference for the design and development of the high integrated RF transceiver system chips.