摘要
随着移动通信系统中上下行业务吞吐量的快速增长,HARQ存储器大小的需求及交互访问量的不断增加,以及终端设备功耗指标的持续飙升,由此对片内HARQ存储方式进行研究,提出一种运行时间在满足0.5ms的条件下,能使数据搬移和硬件加速器可并行工作的硬件实现方案,最后采用了基于VMM的ASIC验证工具对其进行仿真验证.
As mobile communication system downlink throughput rapid business growth , HARQ memory size requirements and the increasing amount of interactive access and terminal equipment power consumption indicators continue to soar ,this article will HARQ-chip storage in conducting research A method of operating time 0 .5ms conditions are met , the data handling and hardware accelerators can be operated in parallel hardware implementation ,and finally using the VMM-based ASIC verification tools for their simulation .
出处
《微电子学与计算机》
CSCD
北大核心
2014年第5期58-61,共4页
Microelectronics & Computer
基金
新一代宽带无线移动通信网国家科技重大专项(2011ZX03001-001-02)
关键词
LTE-A
HARQ
VMM方法学
存储器
I.TE-A
HARQ
verifacation methodology manual （VMM） methodology
memory
