期刊文献+

高速电路中地弹噪声抑制的研究 被引量:2

Research on Ground Bounce Noise Suppression in High-Speed Circuit
下载PDF
导出
摘要 研究了高速电路领域中的一类重要的电源完整性问题,即电源地平面之间激发的地弹噪声问题。地弹噪声的存在严重破坏了电源/地平面的完整性,导致供电电压幅度的不稳定,严重之时甚至导致电路的误判。针对这一问题,设计了一种超宽带电磁带隙结构。实验结果表明,这种电磁带隙结构可以在0.5~5.5GHz(11倍频程)频段内实现优于30dB的噪声抑制能力。文章还探讨了带隙结构作为电源平面时信号传输的完整性。研究表明,如果电路工作频率高达GHz或更高,在电源/地平面采用这种带隙结构,可以有效地避免地弹噪声带来的影响,并保证电源和信号的完整性。 In this paper, we study the ground bounce noise (GBN) excited between power/ground planes, which is one important issue in the area of power integrity (PI) in high-speed circuits. The GBN has a negative impact on PI, leading the voltage swing and even circuit logic error. To overcome the problem, an ultra-wide band electromagnetic band-gap (EBG) structure is proposed to supress. The noise experimental results show that the suppression is over 30dB in 0.5 ~ 5.5 GHz. The signal integrity performance is also investigated when introducing the EBG structure on the power plane. Our re- search has proved that the EBG structure could suppress the GBN in high-speed circuit working at GHz or higher frequency, and as a result, keep the power and signal integrity.
出处 《微波学报》 CSCD 北大核心 2014年第3期32-36,共5页 Journal of Microwaves
基金 国家自然科学基金(60671002)
关键词 电源完整性 信号完整性 地弹噪声 电磁带隙结构 power integrity ( PI), signal integrity ( SI), ground bounce noise ( GBN), electromagnetic band-gap(EBG) structure
  • 相关文献

参考文献27

  • 1Young B. Digital Signal Integrity: Modeling and Simula- tions with Interconnects and Packages [ M ]. NJ : Prentice Hall, 2001.
  • 2Johnson H, Graham M. High Speed Digital Design-A Handbook of Black Magic [ M ]. NJ: Prentice Hall, 1993.
  • 3Bogatin E. Signal Integrity: Simplified [ M ]. N J: Pren- tice Hall, 2004.
  • 4Montrose M I. EMC and the Printed Circuit Board De- sign, Theory and Layout Made Simple [ M]. N J: IEEE Press, 1999.
  • 5Senthinatan R, Price J. Simultaneous Switching Noise of CMOS Devices and Systems[ M]. MA: Klowar, 1994.
  • 6Djordjevic A R, Sarkar T K. An investigation of delta-I noise on integrated cireuits [ J]. IEEE Trans Electromag Cnmpat, 1993, 35(2): 134-147.
  • 7Hubing J H, Drewniak J L, Van Doren T P, et al. Pow- er-bus decoupling on muhilayer printed circuit boards [J]. IEEE Trans Electromagn Compat, 1995, 37(2): 155-166.
  • 8Archambeault B, Ruehli A. Analysis of power/ground plane EMI decoupling performance uising the partial ele- ment equivalent circuit technique [J]. IEEE Trans Elec- tromagn Compat,2001,43(4) : 437-445.
  • 9Ricchiuti V. Power supply decoupling on fully populated high-speed digital PCBs [ J ]. IEEE Trans Electromagn Compat, 2001,43(4): 671-676.
  • 10Madou A, Martens L. Electrical behavior of decoupling capacitors embedded in muhilayered PCBs [ J ]. IEEE Trans Electromagn Compat, 2001,43 (4) : 549-556.

二级参考文献13

  • 1杨瑾屏,赵建中,吴文.一种微带结构的EBG特性研究[J].微波学报,2005,21(5):51-53. 被引量:2
  • 2Lei C T, Techentin R W, Hayes P R, Schwab D J, Gilbert B K. Wave model solution to the ground/power plane noise problem[J]. IEEE Trans Instrum Meas, 1995, 44 ( 2 ) : 300-303.
  • 3Wang Z L, Wada O, Toyata Y, Koga R. Convergence acceleration and accuracy improvement in power bus impedance calculation with a fast algorithm using cavity modes[ J]. IEEE Trans Electromagn Compat, 2005, 47 (1): 2-9.
  • 4Wang Z L, Wada O, Toyata Y, Koga R. Reducing Qfactors of resonances in power/ground planes of multilayer PCBs by using resistive metal films Trans [ J ]. IEE Japan, 2001, 121-A(10) :928-932.
  • 5Wang Z L, Wada O, Toyata Y, Koga R. An improved closed-form expression for accurate and rapid calculation of power/ground plane impedance of multilayer PCBs [ C ]. Proc Symp Electromagn Theory, Toyama, Japan, 2000. 17-23.
  • 6Sorrentino R. Planar Circuits, Waveguide Models, and Segmentation Method [ J ]. IEEE Trans Microwave Theory Tech, 1985, 33(10): 1057-1066.
  • 7Wang Z L, Wada O, Toyata Y, Koga R. Virtual port parameter in segmentation method for modeling power bus structures in muhilayer PCBs[ C]. Digest of the 10th International Symposium in Microwave and Optical Technology( ISMOT-2005 ), 2005. 112.
  • 8Wang Z L, Wada O, Toyata Y, Koga R. Application of segmentation method to analysis of power/ground plane resonance in muhilayer PCBs[ C ]. Proc 3rd Int Symposium on Electromagnetic Compatibility, 2002. 775-778.
  • 9Wang Z L, Wada O, Toyata Y, Koga R. Efficient calculation of power bus impedance using a fast algorithm together with a segmentation method [ J ]. Trans IEE Japan, 2004, 124(12) : 1185-1192.
  • 10Wang Z L, Wada O, Toyata Y, Koga R. Modeling of gapped power bus structures for isolation using cavity modes and segmentation [ J ]. IEEE Trans Electromagn Compat, 2005, 47(2) :210-218.

共引文献3

同被引文献1

引证文献2

二级引证文献5

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部