逻辑电路动态老化试验的输入矢量选择方法

A Test Pattern Selection Method of Dynamic Burn-In for Logic Circuits

针对逻辑电路动态老化试验的输入矢量优化问题,提出一种用于实现被测芯片的自加热能力的输入矢量优化选择方法.该方法采用转换故障模型,利用ATPG手段生成备选的输入矢量集合;为提高功耗权重计算的精确性,对不同类型的门电路在不同输入组合情况下的功耗权重进行了分析;根据逻辑仿真结果,引入功耗权重指标来描述在不同矢量组合输入条件下被测电路的功耗;以哈密尔顿回路为模型,采用遗传算法在功耗权重的引导下进行优化输入矢量序列的选取.在ISCAS’85基准电路上的实验数据表明,文中方法选取的输入矢量序列可在保持较高电路功耗的同时有效地减少电路中无跳变节点的数量,起到了功耗均匀化的效果.

Towards the requirement on input patterns of logic circuits for dynamic burn-in application, thispaper proposes an input pattern selection method to self-heat the CUTs. The candidate input pattern set isgenerated by ATPG tools with transition fault model. The power weights of the different types of gate withvarious input combinations are investigated to lead to more accurate results. According to the result of logicsimulation, a power weight is introduced to describe the power consumption of CUTs. Then the optimal patternsequence is selected using a genetic algorithm directed by the power weight with a Hamilton Loopmodel. Experimental results on ISCAS’85 benchmark circuits show that, in comparison with the pattern pairto generate the maximum power dissipation, the pattern sequence generated can reduce the number ofnon-transition nodes while sustaining high burn-in power dissipation, which can make the power more uniformin the CUTs.