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3D NoC中故障感知的RVOQ容错架构设计 被引量:3

A Fault-Tolerant Architecture Design of Fault-Aware RVOQ in Three-Dimensional Network-on-Chip
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摘要 针对因路由器内部输入缓存和交叉开关故障引起的可靠性及网络拥塞问题, 提出-种故障感知的RVOQ 容错架构设计方案. 首先在输入端口处增加冗余虚通道进行输入缓存故障的容错设计, 通过故障信息的反馈和仲裁算法使得数据选择有效的路径进行传输; 然后修改交叉开关的架构, 增加多路选择开关和相应控制模块, 输入数据优先考虑本地数据链路, 故障情况下选择冗余路径进行数据传输. 实验结果表明, 在故障数为3 时, 该方案比已有方法的时延降低了11%-53.1%; 在网络出现多个故障、面临网络重负载时, 仍然能够保证系统的高可靠性以及传输性能. Aiming at the reliability and congestion problems caused by the faults occurring in input bufferand crossbar of the router, this article proposes a fault-tolerant and fault-aware RVOQ router design to toleratefault. Firstly, this article adds a redundant virtual channel in each input port to tolerate input buffer faults,through the feedback of fault information and arbitration algorithm, our fault-tolerant architecture design canensure data select valid path to transmit. Secondly, this article modifies the crossbar architecture, by adding amulti-channel selection switch and corresponding control modules, input data gives priority to the local datachannel, when faults occur, the data select redundant path to transmit. The experimental results show that,compared to the reference documentation, our proposed scheme has 11%.53.1% less average network latencyin the presence of 3 faults under uniform traffic pattern. Our scheme has obvious advantage and ensuresthe high-reliability and low-latency of the entire network when congestion and faults occur.
出处 《计算机辅助设计与图形学学报》 EI CSCD 北大核心 2015年第1期192-200,共9页 Journal of Computer-Aided Design & Computer Graphics
基金 国家自然科学基金(61474036 61274036 61371025) 中央高校基本科研业务费专项资金(J2014HGBZ0175)
关键词 三维片上网络 输入缓存 交叉开关 故障感知 容错 three-dimensional Network-on-Chip input buffer crossbar fault-aware fault-tolerance
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