摘要
侧信道分析方法已成为不同类型密码芯片的主要威胁,现有国际上及国内针对侧信道分析提出的测试平台主要基于智能卡和FPGA芯片两种,且这些测试平台只针对某种特定芯片进行安全性测试。面对软件、硬件及软硬件协同的密码芯片设计,文中提出一种基于SOPC芯片的侧信道测试平台,可以同时在一块芯片上模拟以上三种类型的密码芯片设计,极大降低了测试成本。同时,文中针对AES加密算法,对软件、硬件及软硬件协同设计下的密码实现安全性进行较详细分析,其分析结果对密码芯片设计者是一个有力的辅助。
Side-channel security analysis now becomes the major threat of different cipher chips. The exist testing platform of side-channel analysis at home and abroad is mainly based on the smart card and FPGA chip, and this platform merely evaluates the security of certain chips. Duo to that no test platform could e- valuate the software, hardware and software and hardware co-designed cipher chip, the side-channel test platform based on SOPC chip is proposed, and the proposed platform could simulate the design of above three different cipher chips at the same time on a chip, and thus greatly reduce the testing cost. Moreover, aiming at AES eneryption algorithm, this paper analyzes in detail the security of these three different imple- mentations, and the analysis result is beneficial to cipher-chip designers.
出处
《通信技术》
2014年第12期1445-1450,共6页
Communications Technology
基金
北京市科技计划(No.Z111104062210001)
国家自然科学基金(No.61472292
No.61202386)~~