基于gm/ID的CMOS模拟集成电路设计方法及应用

CMOS analog IC design methodology based on gm/ID and its application

介绍一种基于gm/ID参数特性的模拟电路优化设计方法,并以CMOS两级运算放大器的设计为例具体阐述该方法的基本设计步骤和与传统设计方法相比的优势。该方法以晶体管的跨导和漏电流的比值gm/ID与反型系数IC的特性曲线作为设计参量来对电路进行设计。基于gm/ID的设计方法对晶体管工作在所有的工作区域均有效。实验仿真结果很好地验证了gm/ID设计方法的有效性。

This paper describes a transistor optimization methodology for analog integrated CMOS circuit based on the gm/ID parameter characteristic of transistor. This methodology dependents on curve of gm/ID and IC in all operations regions. This curve is continuous in all regions of operation. By an example, we show the results obtained from the design of a two-stage-CMOS op amp. Experimental results are presented, in order to validate the methodology.