一种n^+/p^+环接MOS电容的研制

Research and Fabrication of the n^+/p^+ Looping MOS Capacitors

电容是集成电路的一个组成部分,由于MOS电容与CMOS工艺流程匹配,所以应用广泛。为了改善传统MOS电容值随电压特性的改变而变化的现象,并提高MOS电容值的稳定性,提出了一种新型MOS电容的制作方法和连接结构。新结构是将传统MOS电容的一个n+电极更改为p+电极,这样可以使器件的输入电势极性更改前后都为栅氧电容,但在极性更替间,由于有耗尽层存在,电容仍会变小。将两个新结构MOS电容环接,即将其中一个电容的多晶硅层与另一个电容的阱相连接,并用金属连线引出电极,测试结果表明,与传统MOS电容相比,新型MOS电容提升了零电压附近突变区域电容最低值,减小了器件电流波动幅度,有利于提高器件的可靠性。

The capacitor is an integral part of the IC, the MOS capacitor can match with the CMOS process, so it is widely used. In order to improve the phenomenon of the traditional MOS capacitors capacitance value varies with the change of voltage characteristic changing, and to improve the stability of the MOS capacitor, a manufacture method and the connection structure of the novel MOS capacitor were presented. The new structure was the traditional MOS capacitor electrode in a two electrodes changed from n^＋ electrode to p^＋ electrode. The gate oxide capacitance of the devices hardly changed, before and after the changing of the input voltage polarity. During the polarity replacement, due to the depletion layer was present, the capacitance still became smaller. The two novel MOS capacitor structures looping, that is, the polysilicon layer of one capacitor was connected to the well of another capacitor, and the electrode was led out by a metal wiring. The test results show that compared to the traditional MOS capacitors, the minimum capacitance value of the mutation region near zero voltage was improved, the current fluctuation range of the device was reduced. And the novel MOS can improve the reliability of the devices.