摘要
通过时分复用的硬件方法,设计实现了面向LTE-A宽带通信的PBC(Parallel Bit Coprocessor)并行比特协处理器。该协处理器支持2G/3G/LTE/LTE-A标准的高速比特处理。协处理器以并行计算的结构,支持CRC校验、卷积码/Turbo码编解码、比特交织等宽带通信中的比特处理,吞吐率达600 Mb/s。在65 nm CMOS工艺下,该译码器面积约为1.9 mm×2.1 mm,slow case下时钟速率550 MHz;工作在510 MHz时,可完成面向LTE-A的600 Mb/s高速比特处理需求。
In this paper,a parallel bit coprocessor for LTE-A widebande communications is presented. It can finish the bit processing for 2G/3G/LTE/LTE-A communications including a CRC checker, a channel codec and a bit interleaver, with 600 Mb/s thoughputs. Realized as a configrable coprocessor, it allows high-thoughput bit-processing for a vast number of different communi- cation standards with just one single IPcore. Implemented in 65 mn technology, it results in a bit processing throughput of 600 Mb/s for LTE-A systems, at 510 MHz for an area of 1.9 mm×2.1 mm.
出处
《电子技术应用》
北大核心
2015年第1期42-45,共4页
Application of Electronic Technique
基金
国家自然科学基金资助项目(61102073)
