SRAM型FPGA单粒子翻转模拟系统研究

SRAM-based FPGA SEU simulation system

SRAM型FPGA在空间辐照环境下,容易受到单粒子效应的影响,导致FPGA存储单元发生位翻转,翻转达到一定程度会导致功能错误。为了评估FPGA对单粒子效应的敏感程度和提高FPGA抗单粒子的可靠性,对实现故障注入的关键技术进行了研究,对现有技术进行分析,设计了单粒子翻转效应敏感位测试系统,利用SRAM型FPGA部分重配置特性,采用修改FPGA配置区数据位来模拟故障的方法,加速了系统的失效过程,实现对单粒子翻转敏感位的检测和统计,并通过实验进行验证,结果表明:设计合理可行,实现方式灵活,成本低,为SRAM型FPGA抗单粒子容错设计提供了有利支持。

SRAM-based FPGA in the space radiation environment is effected by single event, which leads to the occurrence of FPGA memory cell bit flip. When the flip up to a certain extent, the function may become errors. To assess the sensitivity of FPGA single event and improve the reliability of FPGA single event, the key technology to realize fault injection was studied, the existing technology was analyzed, SEU sensitive bit test system was designed, based on partial reconfiguration feature of SRAM-based FPGA, and the modified FPGA configuration data bits was used to simulate a fault zone, the method accelerated the process of system failure, realized the single event upset sensitive position detection and statistics. Experiments show that the design is reasonable, implementation is flexibale, and cost is low, and provides favorable support for SRAM-based FPGA anti-tolerant design.