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电流模驱动型抗EMI LIN驱动器设计 被引量:1

Design of a Current-Mode EMI-Resisting LIN Driver
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摘要 为了解决现有的电压模驱动型LIN驱动器在抗电磁干扰(EMI)方面的诸多不足,基于电流模驱动,设计了一种抗EMI性能良好的LIN驱动器。电路采用0.5μm 60VBCD工艺制造,依据IEC62132-4标准进行直接功率注入(DPI)仿真[1]。结果表明,在150kHz^1GHz频率范围内,在强度高达5 W的EMI信号下,该驱动器输出信号占空比变化不超过3%,传输延时变化不超过2.4μs。相较于电压模驱动型电路较大的传输延时变化(>10μs)和占空比变化(>23%),设计的驱动器在保持较低电磁辐射(EME)的同时,抗EMI性能得到较大的提高。 To solve some shortcomings of voltage-mode LIN driver in EMI-resisting capacity, a current-mode LIN driver with good EMI-resisting performance was designed. The circuit was fabricated in 0. 5 Itm 60 V BCD process and simulated using direct power injection (DPI) method according to IEC62132-4 standard. Results showed that when the superimposed EMI interference had frequency range from 150 kHz to 1 GHz and power of 5 W, the change of the duty cycle was less than 3 %, and the change of the propagation delay was less than 2.4 μs for the proposed LIN driver. Compared with voltage-mode structure which varied widely in propagation delay (〉10 μs ) and duty cycle (〉 23%), the EMI-resisting performance of the proposed LIN driver was well improved, while maintaining low EME.
出处 《微电子学》 CAS CSCD 北大核心 2014年第6期767-770,共4页 Microelectronics
基金 国家极大规模集成电路制造装备及成套工艺重大专项(2012ZX02503-003)
关键词 LIN驱动器 抗EMI 电流模驱动 BCD工艺 LIN driver EMI-resisting Current-mode drivel BCD process
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参考文献6

  • 1IEC 62132-4,IC’smeasurement of E/M immunity 150kHz to 1 GHz—Part 4: direct RF power injectionmethod [S], 2004.
  • 2LINconsortium, LIN specification package revision 2.0 [S].
  • 3REDOUTE J M,STEYAERT M. An EMI resistingLIN driver in 0. 35-micron high-voltage CMOS [J].IEEE J Sol Sta Circ, 2007,42(7): 1574-1582.
  • 4REDOUTE J M, STEYAERT M. EMI resistingsmart ~ power integrated LIN driver with reduced slopepumping [C] // IEEE Custom Integr Circ Conf. SanJose, CA, USA. 2008: 643-646.
  • 5CHOI S W, PARK H J. A PVT-insensitive CMOSoutput driver with constant slew rate [C] // IEEEAsia Pacific Conf Advan Syst Integr Circ. Seoul,Korea. 2004: 116-118.
  • 6曹桂平,宋克柱,杨俊峰,王砚方.Class-AB型低功耗轨到轨CMOS模拟缓冲器设计[J].微电子学,2012,42(4):477-480. 被引量:2

二级参考文献8

  • 1LOPEZ-MARTIN A J, BASWA S, ANGULO J R, et al. Power-efficient class AB CMOS buffer[J]. ElecLett, 2009, 45(2): 89-90.
  • 2CARRILLO J M, CARVAJAL R G, TORRALBA A, et al. Rail-to-rail low-power high-slew-rate CMOS analog buffer [J].Elec Lett, 2004, 40(14): 843-844.
  • 3CARRILLO J M, DUQUE-CARRILLO J F, TORRALBA A, et al. Class-AB rail to rail CMOS analog buffer [C]// IEEE Int Symp Cire Syst. 2005, 2:1008-1011.
  • 4SAWIGUN C, J, A, et al. A low-power CMOS analog voltage buffer using compact adaptive biasing [C] // 18th Europ Conf Cite Theo Des. 2007: 1-4.
  • 5WONG S L, SALAME C A. An efficient CMOS buffer for driving large capacitive loads [J]. IEEE J Sol Sta Circ, 1986, 21(3): 464-469.
  • 6ELWAN H, ISMAIL M. CMOS low noise class AB buffer[J].ElecLett, 1999, 35: 1834-1836.
  • 7DLU C-W. High-speed driving scheme and compact high-speed low-power rail-to-rail class-B buffer amplifier for LCD applications[J].IEEE J Sol Sta Circ, 2004, 39(11): 1938-1947.
  • 8ITAKU T, MINAMIZAKI H, SATIO T, et al. A 402-output TFT-LCD driver IC with power control based on the number of colors selected [J]. IEEE J Sol Sta Circ, 2003, 38(3): 503-510.

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